When running a test you go through the following flow.
When trying to constrain minimum and maximum payload size, the constraints in the test wouldn't be obeyed, due to a bad interaction between keep soft and keep soft ... select ==
We had the following code in our tests:
extend SEMI_RANDOM eth_seq {
packet_size_mode : [ALL_JUMBO,MIX,NO_JUMBO,ALL_64];
keep …I just read this article (Accellera DAC 2014 Breakfast—What Engineers Really Think About UVM). They hit a few interesting points.
I'd like to add another few points that I think were missed in this discussion.
So after I described my troubles with the UVM register model's coverage in my previous post, I revisited the issue in a slightly different context and discovered the current solution was rather lacking.
In the previous example, coverage was taken for a value written via the register …
I have been dabbling now for a couple of weeks with coverage. Working my way through the SV LRM, looking at some examples and running a few simple cases.
My first case was some protocol coverage. We wanted to verify certain types of traffic …
According to a story I was told, the origin of the uvm_resource_db stems from the fact that certain simulators (if I remember correctly Mentor's Modelsim/Questa), were unable to cope with the dot-notation. Eg. You could not write m_object.m_field = 1, instead you'd have to put the field …
A couple of weeks ago, I created a status register callback class.
The purpose of it was to create a built-in scoreboard allowing me to predict the value of a status register based on the known status signal's input.
I'll maybe post the code in a sometime in the future …
Read moreToday I was bitten twice by the same issue: randomization.
When you randomize something you should always assert the randomization. This will allow you to find the source of the problem much quicker. I lament the fact that UVM sequence macros do not assert the randomization by default. Instead they …
Read moreBack when I started using UVM, I had no use for a register model for the specific unit I was testing. As such, sequences were written which needed a sequencer which would hand the items in the sequence to the driver.
Over time, we moved to use the register model …
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