uvm_reg

UVM register model coverage woes - part 2

Mon 24 March 2014 by Tsvi Mostovicz / Verification

So after I described my troubles with the UVM register model's coverage in my previous post, I revisited the issue in a slightly different context and discovered the current solution was rather lacking.

Register block coverage

In the previous example, coverage was taken for a value written via the register …

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My issues with uvm_reg's predict method

Mon 29 April 2013 by Tsvi Mostovicz / Verification

A couple of weeks ago, I created a status register callback class.

The purpose of it was to create a built-in scoreboard allowing me to predict the value of a status register based on the known status signal's input.

I'll maybe post the code in a sometime in the future …

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